Job description

Synopsys Is Hiring Intern (VLSI Design) | Bangalore

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

We are looking for engineering graduates/PG students to work as interns in the field of VLSI.  Does this sound like a good role for you?

The role will be focused on VLSI design in the following areas related to connectivity protocols: DDR PHY.

The nature of the role will be:

• VLSI Design of sub-blocks/exploration of latest features and standards.
• Based on the project assigned, the job would involve one or more of the following activities: Verilog/System Verilog
• Exposure to UVM methodology, working with EDA tools like Design Compiler for Synthesis, SpyGlass for Lint, VCS for simulation.

Key Qualifications:

• Must have completed Bachelors’ degree in Electronics/ Electrical Engineering.
• Partial completion of MS/MTech preferable. (Electrical/Electronics/VLSI/MicroElectronics or allied specializations.)
• Minimum 7.0 CGPA/ 70% in Bachelor’s in Engineering and 7.5 CGPA in Masters till the current semester.
• Need to be backed with consistently high academics in the 10th std and 12th standard.

Preferred Experience:

• Strong fundamentals in Digital electronics.
• HDL Languages coding experience preferably in Verilog/System Verilog.
• Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

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Interested candidates apply through the below link. Apply before the link expires.
( Select Apply Without Registration )

Note: Only shortlisted candidates will receive the call letter for further rounds.